About Espressif Systems
Espressif Systems is a leading provider of IoT and edge AI solutions, specializing in wireless technologies and embedded systems. We are committed to pushing the boundaries of innovation to empower developers and businesses in creating connected devices for a smarter world.
Job Description
Espressif Systems is seeking a talented and motivated Software Engineer to join our team and work on RISC-V compiler and toolchain aspects. The successful candidate will be responsible for developing and optimizing compiler toolchains to support custom instructions required for AI (Artificial Intelligence) and NPU (Neural Processing Unit) accelerators, among other responsibilities.
Responsibilities
1. Develop and maintain compiler toolchains for the RISC-V architecture, focusing on supporting custom instructions required for AI and NPU accelerators.
2. Run benchmarks to analyze CPU performance/code density and make compiler optimizations.
3. Enhance GCC/LLVM compiler for RISC-V CPU ISA custom extensions to support DSP/Vector or other specialized accelerators.
4. Work on the design and implementation of AI instruction extensions within the compiler toolchain.
5. Collaborate with hardware engineers to define and implement custom instruction sets for AI applications.
6. Collaborate with the AI software team to ensure seamless integration and compatibility of AI instruction extensions within the toolchain.
7. Conduct FPGA tests for AI instructions to verify functionality and performance.
8. Perform end-to-end performance testing and functional verification using the PIE custom toolchain.
Qualifications
1. Master's degree in Computer Science, Electrical Engineering, or related field.
2. Solid understanding of compiler theory, computer architecture, and RISC-V instruction set architecture.
3. Proficiency in programming languages such as C/C++/Assembly and experience with compiler development.
4. Experience in FPGA testing, including test case development and execution.
5. Familiarity with AI concepts and technologies, including neural networks and deep learning frameworks.
6. Familiarity with SIMD/Vector/AI hardware accelerators.
7. Experience with open-source toolchain GCC/LLVM contributions will be a plus.